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ltc2960 1 2960f typical application features description 36v nano-current two input voltage monitor the ltc ? 2960 is a nano-current, high voltage two input voltage monitor, ideally suited for multicell battery ap- plications. external resistive dividers configure custom comparator thresholds. the supervisory circuit monitors the adj input and pulls the rst output low when the input drops below threshold. a reset timeout period delays the return of the rst output to a high state when the input rises above the threshold. the spare comparator allows voltage conditions to be detected with either a non-inverting input, in + (ltc2960-1/ltc2960-3) or an inverting input, in C (ltc2960-2/ltc2960-4). a manual reset ( mr) input is provided for external activation of the reset output. other options provided on the ltc2960-1/ltc2960-2 in- clude a reset timeout period select pin, rt, to select between 15ms or 200ms reset timeout periods. the ltc2960-3/ ltc2960-4 have a fixed 200ms reset timeout period. the rst and out outputs are available with active pull-up cir- cuits to an output logic supply pin (ltc2960-3/ltc2960-4) or 36v open-drain outputs (ltc2960-1/ltc2960-2). battery and regulator monitor supply current vs supply voltage applications n 850na quiescent current n operating range: 2.5v < v cc < 36v n 1.5% (max) accuracy over temperature n adjustable reset threshold n wide temperature range (C40c to 125c) n adjustable in + /in C threshold n manual reset input n compact 2mm 2mm 8-lead dfn and tsot-23 (thinsot?) packages n portable equipment n battery powered equipment n security systems n automotive systems l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks and thinsot is a trademark of linear technology corporation. all other trademarks are the property of their respective owners. ltc2960 option table option inputs reset timeout period output type ltc2960-1 adj/in + 15ms/200ms 36v open-drain ltc2960-2 adj/in C 15ms/200ms 36v open-drain ltc2960-3 adj/in + 200ms active pull-up ltc2960-4 adj/in C 200ms active pull-up + v cc in + dv cc gnd rst out adj mr ltc2960-3 ltc3632 dc/dc gnd li-ion 4.2v + li-ion 4.2v c1 0.1f 50v c2 1f r2 6.04m r1 402k 6v < v in < 8.4v r4 1.3m r3 402k v out 1.8v reset low battery power-fail falling threshold = 6.410v reset falling threshold = 1.693v 2960 ta01 v cc (v) 0 0 i cc (na) 900 600 300 1200 4032 816 2960 ta01a 24 mr =5v, 27c
ltc2960 2 2960f absolute maximum ratings input voltages v cc , rt, mr .......................................... C0.3v to 40v dv cc ........................................................ C0.3v to 6v adj, in + , in C ......................................... C0.3v to 3.5v output voltages (ltc2960-1/ltc2960-2) rst , out ............................................... C0.3v to 40v output voltages (ltc2960-3/ltc2960-4) rst , out (dv cc 1.6v) ......... C0.3v to (dv cc + 0.3v) rst , out (dv cc = gnd) ....................... C0.3v to 6.3v (notes 1 & 2) top view v cc rt/dv cc rst out in + /in C adj mr gnd dc8 package 8-lead (2mm 2mm) plastic dfn 9 4 1 2 3 6 5 7 8 t jmax = 150c, ja = 80.6c/w exposed pad (pin 9) pcb gnd connection optional 1 2 3 4 8 7 6 5 top view ts8 package 8-lead plastic tsot-23 v cc rt/dv cc rst out in + /in C adj mr gnd t jmax = 150c, ja = 195c/w pin configuration order information lead free finish tape and reel (mini) tape and reel part marking package description temperature range ltc2960cdc-1#trmpbf ltc2960cdc-1#trpbf lfzz 8-lead (2mm 2mm) plastic dfn 0c to 70c ltc2960idc-1#trmpbf ltc2960idc-1#trpbf lfzz 8-lead (2mm 2mm) plastic dfn C40c to 85c ltc2960hdc-1#trmpbf ltc2960hdc-1#trpbf lfzz 8-lead (2mm 2mm) plastic dfn C40c to 125c ltc2960cdc-2#trmpbf ltc2960cdc-2#trpbf lgbc 8-lead (2mm 2mm) plastic dfn 0c to 70c ltc2960idc-2#trmpbf ltc2960idc-2#trpbf lgbc 8-lead (2mm 2mm) plastic dfn C40c to 85c ltc2960hdc-2#trmpbf ltc2960hdc-2#trpbf lgbc 8-lead (2mm 2mm) plastic dfn C40c to 125c ltc2960cdc-3#trmpbf ltc2960cdc-3#trpbf lfsf 8-lead (2mm 2mm) plastic dfn 0c to 70c ltc2960idc-3#trmpbf ltc2960idc-3#trpbf lfsf 8-lead (2mm 2mm) plastic dfn C40c to 85c ltc2960hdc-3#trmpbf ltc2960hdc-3#trpbf lfsf 8-lead (2mm 2mm) plastic dfn C40c to 125c ltc2960cdc-4#trmpbf ltc2960cdc-4#trpbf lgbf 8-lead (2mm 2mm) plastic dfn 0c to 70c ltc2960idc-4#trmpbf ltc2960idc-4#trpbf lgbf 8-lead (2mm 2mm) plastic dfn C40c to 85c ltc2960hdc-4#trmpbf ltc2960hdc-4#trpbf lgbf 8-lead (2mm 2mm) plastic dfn C40c to 125c average currents rst , out ...........................................................5ma operating ambient temperature range ltc2960c ................................................ 0c to 70c ltc2960i ............................................. C40c to 85c ltc2960h .......................................... C40c to 125c storage temperature range .................. C65c to 150c lead temperature (soldering, 10 sec) tsot-23 package ............................................. 300c
ltc2960 3 2960f order information lead free finish tape and reel (mini) tape and reel part marking package description temperature range ltc2960cts8-1#trmpbf ltc2960cts8-1#trpbf ltfzy 8-lead plastic tsot-23 0c to 70c ltc2960its8-1#trmpbf ltc2960its8-1#trpbf ltfzy 8-lead plastic tsot-23 C40c to 85c ltc2960hts8-1#trmpbf ltc2960hts8-1#trpbf ltfzy 8-lead plastic tsot-23 C40c to 125c ltc2960cts8-2#trmpbf ltc2960cts8-2#trpbf ltgbb 8-lead plastic tsot-23 0c to 70c ltc2960its8-2#trmpbf ltc2960its8-2#trpbf ltgbb 8-lead plastic tsot-23 C40c to 85c ltc2960hts8-2#trmpbf ltc2960hts8-2#trpbf ltgbb 8-lead plastic tsot-23 C40c to 125c ltc2960cts8-3#trmpbf ltc2960cts8-3#trpbf ltfsd 8-lead plastic tsot-23 0c to 70c ltc2960its8-3#trmpbf ltc2960its8-3#trpbf ltfsd 8-lead plastic tsot-23 C40c to 85c ltc2960hts8-3#trmpbf ltc2960hts8-3#trpbf ltfsd 8-lead plastic tsot-23 C40c to 125c ltc2960cts8-4#trmpbf ltc2960cts8-4#trpbf ltgbd 8-lead plastic tsot-23 0c to 70c ltc2960its8-4#trmpbf ltc2960its8-4#trpbf ltgbd 8-lead plastic tsot-23 C40c to 85c ltc2960hts8-4#trmpbf ltc2960hts8-4#trpbf ltgbd 8-lead plastic tsot-23 C40c to 125c consult ltc marketing for parts specified with wider operating temperature ranges. consult ltc marketing for information on non-standard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ electrical characteristics the l denotes specifications that apply over the full operating temperature range, otherwise specifications are at t a = 25c, v cc = 7v, dv cc = 3.3v unless otherwise noted (note 2). symbol parameter conditions min typ max units v cc v cc input supply operating range l 2.5 36 v v uvlo v cc undervoltage lockout v cc undervoltage lockout hysteresis v cc rising l 1.85 100 2.3 v mv i cc v cc input supply current mr = 5v, v cc = 36v, C40c t a 85c mr = 5v, v cc = 36v, C40c t a 125c l l 400 400 850 850 1250 2000 na na dv cc dv cc input supply operating range l 1.6 5.5 v i dvcc dv cc input current rst = out = low dv cc = 5.5v l 50 na threshold adjustment inputs: adj, in + /in C v th adj/in + input threshold in C input threshold monitored voltage falling monitored voltage rising l l 394 394 400 400 406 406 mv mv v thm adj to in + /in C threshold matching l 2 6 mv v rhys adj threshold hysteresis monitored voltage rising l 81015 mv v + hys in + threshold hysteresis monitored voltage rising l 18 20 25 mv v C hys in C threshold hysteresis monitored voltage falling l 18 20 25 mv t uv under voltage detect to rst , out falling v = v th C40mv l 80 170 500 s i th(lkg) input leakage current v = 420mv, C40c t a 85c v = 420mv, C40c t a 125c l l 0.1 0.1 1 10 na na
ltc2960 4 2960f electrical characteristics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. the l denotes specifications that apply over the full operating temperature range, otherwise specifications are at t a = 25c, v cc = 7v, dv cc = 3.3v unless otherwise noted (note 2). note 2. all currents into pins are positive; all voltages are referenced to gnd unless otherwise noted. typical performance characteristics supply current vs supply voltage mr current vs mr voltage supply current vs mr voltage symbol parameter conditions min typ max units control inputs: mr , rt v rt control input threshold rt l 0.4 1.4 v v mr control input threshold mr l 0.4 1.4 v t pw mr minimum detectable pulse width l 20 s t pd propagation delay to rst falling manual reset falling l 1 7 20 s v mr manual reset open voltage mr open, mr load = 100na l 2.6 4 v i mr manual reset low current mr = 400mv, v cc 2.5v l C0.35 C1 C3 a i lk input leakage current rt = 15v mr = 15v l l 100 100 na na status outputs: rst, out v ol voltage output low v cc = 1.2v, i = 10a (ltc2960-1/ltc2960-3) v cc = 3v, i = 500a l l 25 100 100 400 mv mv v oh voltage output high i = C100a (ltc2960-3/ltc2960-4) l 0.7?dv cc v i oh leakage current, output high v = 5.5v v = 15v (ltc2960-1/ltc2960-2) v = 5.5v, dv cc = gnd l l l 50 100 50 na na na i sc output short-circuit current rst = gnd dv cc = 6v (ltc2960-3/ ltc2960-4) out = gnd dv cc = 6v (ltc2960-3/ ltc2960-4) l l 0.8 0.8 3 3 ma ma t rst reset timeout period ltc2960-3/ltc2960-4 rt input high rt input low l l l 140 140 10 200 200 15 280 280 25 ms ms ms v cc (v) 0 0 i cc (na) 1200 900 600 300 1500 24 32 40 816 2960 g01 125c 90c 27c C45c mr voltage (v) 0 0 mr current (a) 1.2 1.0 0.8 0.6 0.4 0.2 432 15 2960 g02 v cc = 2.5v v cc = 7v mr voltage (v) 0 0 mr current (a) 2.5 2.0 1.5 1.0 0.5 432 15 2960 g03 v cc = 2.5v v cc = 7v
ltc2960 5 2960f typical performance characteristics mr rising threshold/open voltage vs v cc normalized reset timeout period vs temperature comparator overvoltage/ undervoltage glitch immunity adj, in + , in C threshold vs temperature voltage output high vs pull-down current (rst/out) voltage output low vs pull-up current (rst/out) voltage output high vs pull-down current (rst/out) v cc (v) 2.5 0.4 2.4 1.9 1.4 0.9 4.5 3.5 4.0 3.0 5.0 2960 g04 mr open voltage 27c mr input threshold 27c rising threshold/open voltage (v) temperature (c) C50 0.7 1.3 1.1 1.2 0.9 1.0 0.8 100 50 75 025 C25 125 2960 g05 normalized reset time period v cc = 7v comparator overdrive (%) 0.1 0.0 4.0 3.0 1.0 2.0 10 1 100 2960 g06 glitch duration (ms) adj/in + /in C v cc = 7v temperature (c) C50 370 430 410 420 400 390 380 755025 C25 100 0 125 2960 g07 v th (mv) v + hys v rhys v th v C hys pull-down current(ma) 0 0 3.5 2.0 3.0 1.5 2.5 1.0 0.5 C0.6 C0.4 C0.2 C0.8 2960 g08 v oh (v) C45c 27c 90c 125c v cc =7v dv cc =3.3v pull-up current (ma) 0 0 2.0 1.6 1.2 0.8 0.4 32 145 2960 g09 v ol (v) v cc =7v dv cc =3.3v C45c 27c 90c 125c pull-down current(a) 0 0 2.0 1.6 1.2 0.8 0.4 C40 C20 C60 C80 2960 g08 v oh (v) C45c 27c 90c 125c v cc =7v dv cc =1.6v
ltc2960 6 2960f pin functions adj: reset threshold adjustment input. tie to resistive divider to configure desired reset threshold. dv cc : (ltc2960-3/ltc2960-4) logic supply input. used for setting the logic swing of the rst and out outputs. useful for interfacing with logic voltages different from v cc . bypass dv cc with 0.1f to gnd. grounding dv cc allows out and rst to act as open drain outputs. exposed pad (dfn only): exposed pad may be left floating or connected to device ground. gnd: device ground. in C : (ltc2960-2/ltc2960-4) in C threshold adjustment input. tie to resistive divider to configure required thresh- old. tie to gnd if unused. in + : (ltc2960-1/ltc2960-3) in + threshold adjustment input. tie to resistive divider to configure required thresh- old. tie to gnd if unused. mr: manual reset input. attach a push-button switch or logic signal between this input and ground. a logic low on this input pulls rst low. when the mr input returns to logic high, rst returns high after a reset timeout period has expired. leave open if unused. out: (ltc2960-1/ltc2960-3) pulls low when monitored voltage falls below the in + threshold. released when the in + voltage rises above its threshold by 5%. for the ltc2960-3, out is driven by dv cc when logic high. out is open drain if dv cc is grounded. leave open if unused. (ltc2960-2/ltc2960-4) out pulls low when the monitored voltage rises above the in C threshold. released when monitored voltage falls below in C threshold by 5%. for the ltc2960-4, out is driven to dv cc for a logic high. out is open drain if dv cc is grounded. leave open if unused. rst : reset output. pulls low when monitored voltage falls below the reset (adj) threshold. rst is released after monitored voltage exceeds the reset threshold plus 2.5% hysteresis and after reset timeout period has expired. for the ltc2960-3/ltc2960-4, rst is driven to dv cc for a logic high. rst is open drain if dv cc is grounded. leave open if unused. rt: (ltc2960-1/ltc2960-2) reset timeout period se- lection input. tie to gnd for 15ms delay. tie to v cc for 200ms delay. v cc : power supply input. when v cc falls below the falling uvlo threshold, the outputs are pulled low. if v cc falls below 1.2v the logic state of the outputs cannot be guar- anteed. bypass v cc with 0.1f to gnd. use appropriate voltage rating for bypass capacitor.
ltc2960 7 2960f block diagram timing diagram + C regulator 400mv reference reset delay v cc mr rst out in + (ltc2960-1/ltc2960-3) in C (ltc2960-2/ltc2960-4) adj 1a 0.4v gnd rt ltc2960-1/ltc2960-2 dv cc ltc2960-3/ltc2960-4 0.4v ltc2960-2/ltc2960-4 ltc2960-1/ltc2960-3 + C 2960 bd in + /out timing in C /out timing adj/rst timing v th + v + hys v th v th + v rhys v th v th v th + v C hys v in + v adj t pd t rst t rst v in C out rst mr out 2960 td
ltc2960 8 2960f voltage monitoring the ltc2960 is a voltage supervisor with a wide operating voltage range up to 36v with only 850na quiescent current. the supervisor has two outputs, rst and out that pro- vide voltage monitoring capabilities for system power-up, power-down and brown-out conditions. built-in hysteresis and a reset timeout period ensure that fluctuations due to load transients or supply noise do not cause chattering of the status outputs. the ltc2960 can provide reset and voltage status signals to a microprocessor based system or can alternatively be used as an under voltage lock out (uvlo) for dc/dc switchers or ldos for control over a battery operated system. if the monitored voltage drops below the reset threshold, rst pulls low until the adj input rises above 0.4v plus 2.5% hysteresis. an internal reset timer delays the return of the rst output to a high state to provide monitored voltage settling and initialization time. the rst output is typically connected to a processor reset input. if the monitored supply voltage falls to the in + (ltc2960-1/ ltc2960-3) threshold, the spare comparator pulls out low. out remains low until the in + input rises above 0.4v plus 5% hysteresis. out is typically used to signal preparation for controlled shutdown. for example, the out output may be connected to a processor nonmaskable interrupt (nmi). upon interrupt, the processor begins shutdown procedures such as supply sequencing and/or storage/ erasure of system state in nonvolatile memory. if the monitored supply voltage rises to the in C threshold (ltc2960-2/ltc2960-4), the spare comparator pulls out low. out remains low until the in C falls below 0.4v minus 5% hysteresis. the ltc2960-2/ltc2960-4 operates as an undervoltage and overvoltage monitor. few, if any, external components are necessary for reliable operation. however, a decoupling capacitor between v cc and ground is recommended (0.01f minimum). use a capacitor with a compatible voltage rating. applications information threshold configuration the ltc2960 monitors voltage applied to its inputs in + /in C and adj. a resistive divider connected between a monitored voltage and ground is used to bias the inputs. figure 1 demonstrates how the inputs can be made dependent upon a single voltage (v1). only three resistors are required. to calculate their values, specify desired falling reset (v r ) and in + (v in + ) thresholds with v in + > v r . for example: v in + = 6.4v, v r = 6v figure 1. configuration for single voltage monitoring adj in + rst out ltc2960-1/ ltc2960-3 r3 r2 v1 r1 2960 f01 the solution for r1, r2 and r3 provides three equations and three unknowns. maximum resistor size is governed by maximum input leakage current. for the ltc2960, the maximum input leakage current below 85c is 1na. for a maximum error of 1% due to both input currents, the resistor divider current should be at least 100 times the sum of the leakage currents, or 0.2a. at the reset threshold, v1 = 6v, r sum = 8m where: r sum = r1 + r2 + r3 both the falling reset and in + thresholds are 0.4v, so: r1 = v th ? r sum v in + = 0.4v ? 8m 6.4v = 500k the closest 1% value is 499k. r2 can be determined from: r2 = v th ? r sum v r Cr1 = 0.4v ? 8m 6v C 499k r2 = 34.33k
ltc2960 9 2960f figure 2. dual voltage monitoring the closest 1% resistor value is 34k. r3 is easily obtained from: r3 = r sum C r1 C r2 = 8m C 499k C 34k r3 = 7.467m the closest 1% resistor value is 7.5m. plugging the standard values back into the equations yields the design values for the falling reset and in + voltages: v in + = 6.4v, v rst = 6.028v figure 2 demonstrates how the inputs can be biased to monitor two voltages (v1, v2). in this example, four resistors are required. calculate each divider ratio for the desired falling threshold (v ft ) using: rnb rna = v ft v th C1 = v ft 0.4v C1 in figure 2, out is tied back to the mr input, making the state of the rst output dependent upon both v1 and v2. if v1 and v2 are both above the configured falling threshold plus hysteresis, rst is allowed to pull high. if independent operation of the status outputs is desired, simply omit the out and mr connection. applications information figure 3. out vs v cc (ltc2960-1) externally configured for 6v threshold with rst tied to v cc through pull-up resistor adj in + rst out mr ltc2960-1/ ltc2960-3 r2b v2 r2a r1b v1 r1a 2960 f02 selecting output logic style the ltc2960 status outputs are available in two options: open-drain (ltc2960-1/ltc2960-2) or active pull-up with the dv cc pin replacing the rt pin (ltc2960-3/ltc2960-4). the open-drain option allows the outputs to be pulled up v cc (v) 0 0 out (v) 6 3 4.5 1.5 7.5 7.5 1.5 3 2960 f03 4.5 6 to a user defined voltage up to 36v with a resistor. the open-drain pull-up voltage may be greater than v cc . select a resistor compatible with desired output rise time and load current specifications. figure 3 demonstrates typical ltc2960-1 out output behavior. when the status outputs are low, power is dissipated in the pull-up resistors. the outputs of both the ltc2960-3 and ltc2960-4 can be configured as either low voltage active pull-up or open- drain. this is done by tying the dv cc pin to either a supply or gnd. using the active pull-up configuration, dv cc tied to a supply, lowers power dissipation by eliminating the static current drawn by pull-up resistors when the outputs are low and improves output rise time. in figure 4(a), an ltc2960-3 has active pull-up outputs configured by tying dv cc to a 1.6v to 5.5v supply. in figure 4(b), the ltc2960-3 has open-drain outputs configured by tying the dv cc pin to ground. when dv cc is connected to ground both outputs are open-drain and pull-up resistors are required. some applications require rst and/or out outputs to be valid with v cc down to ground when dv cc is tied to v cc . active pull-up satisfies this requirement with the ad- dition of an optional external resistor from the output to ground. the resistor provides a path for leakage currents, preventing the output from floating to undetermined volt- ages when connected to high impedance (such as cmos logic inputs). the resistor value should be small enough to
ltc2960 10 2960f applications information provide effective pull-down without excessively loading the pull-up circuitry. a 100k resistor from output to ground is satisfactory for most applications. when the status outputs are high, power is dissipated in the pull-down resistors. if v cc falls below the falling uvlo threshold, the outputs are pulled to ground. the outputs are guaranteed to stay low for v cc 1.2v regardless of the output logic configura- tion. when v cc < 1.2v, the active pull-up output behaves similarly to an open-drain output with a pull-up resistor. and mr is a solution to this issue. the mr input can be pulled to 36v maximum and will not affect the internal circuitry. input mr is often pulled down through the use of a pushbutton switch. selecting the reset timeout period use the rt input (ltc2960-1/ ltc2960-2) to select between two fixed reset timeout periods. connect rt to ground for a 15ms timeout. connect rt to v cc for a 200ms timeout. the reset timeout period occurs after the adj input is driven above threshold and the mr input transitions above its logic threshold. after the reset timeout period, the rst output is allowed to pull up to a high state as shown in figure 5. the rt input is replaced by the dv cc input in the ltc2960-3/ltc2960-4 options and the reset timeout period defaults to 200ms. 0.4v in + ltc2960-3 (a). push-pull configuration (b). open-drain configuration dv cc 1.6v to 5.5v 6.3v max out ltc2960-3 dv cc out C + 0.4v in + C + 2960 f04 figure 4. ltc2960-3 (ltc2960-4) rst and out outputs are configurable as push-pull or open-drain adj 15ms 200ms 2960 f05 rst , rt = gnd rst , rt = v cc figure 5. selectable reset timeout period manual reset input when adj is above its reset threshold and the manual reset input (mr ) is pulled low, the rst output is forced low. rst remains low for the selected reset timeout period after the manual reset input is released and pulled high. the manual reset input is pulled up internally through a 1a current source to an internal bias voltage (see elec- trical characteristics). if external leakage currents have the ability to pull down the manual reset input below its logic threshold, a pull-up resistor placed between v cc external hysteresis the ltc2960 in + comparator hysteresis is 20mv (v + hys ), or 5% referred to v th . certain applications require more than the built-in native hysteresis. the application sche- matic in figure 6 adds one additional resistor (r6) to a typical attenuator network. the procedure below is used to determine a value for r6 to provide an increase over the native hystereis. in this example, it is desired to double the native hysteresis from 300mv to 600mv and achieve a falling threshold of 6v. before including r6, the rising threshold (v r ) is 6.293v while the falling threshold (v f ) is 5.993v. the hysteresis referred to v a is calculated from: v hyst va () = v phys 1+ r4 r5 ? ? ? ? ? ? = 20mv ? 15 = 300mv
ltc2960 11 2960f 2960 f06 dv cc out in + ltc2960-3 r6 6.81m v b v a r4 681k r5 48.7k figure 6. external hysteresis the addition of r6 allows out to sink or source current to the summing junction at in + . neglecting internal switch resistances and providing that r6 >> r5, the externally modified hysteresis (referred to v a ) becomes: v hext v hys(va) + v b r4 r6 ? ? ? ? ? ? since the amount of hysteresis is to be doubled, the second term in the above expression needs to be about 300mv. with a logic supply, v b , equal to 3v, the ratio r4/ r6 should be about 0.1. choosing r6 to be 6.81m satis- fies the design criteria. the addition of r6 modifies the rising and falling thresholds originally determined by r4 and r5. the modified rising threshold becomes: v r = v th + v + hys () ? 1 + r4 r5 + r4 r6 ? ? ? ? ? ? = 400mv + 20mv () ? 1 + 13.98 + 0.1 () = 6.3336v it is apparent that the r4/r6 term does not affect the ris- ing threshold significantly resulting in a change of only +0.645%. the falling threshold incorporating r6 is: v f = v th 1 + r4 r5 + r4 r6 v th Cv b v th ? ? ? ? ? ? ? ? ? ? ? ? = 0.4v ? 1 + 13.98 C 0.65 () = 5.732v applications information the falling threshold can be restored to the original value by reducing the value of r5. under the assumption that the addition of r6 has a negligible impact on the rising threshold, a new r4/r5 ratio can be calculated as shown: r4 r5 = v r v th + v + hys () C1 = 6.6v 420mv C1 = 14.71 given the ratio of r4/r5, the closest 1% resistor value for r5 is 46.4k. with the actual resistor values now known, the final thresholds can be calculated by plugging the values into the equations above for v r and v f to obtain: v r = 6.626v, v f = 6.010v, v hyst = 616mv as a result of the added current component through r6 an error term exists that is a function of the pull-up volt- age, v b in figure 6. operation with supply transients over 40v and hot swapping the circuit in figure 7(a) allows the ltc2960 to withstand high voltage transients. the magnitude of the voltage transients that can be absorbed is set by the voltage rat- ing of rz. a tt-irc pulse-withstanding surface mount 1206 resistor with a nominal voltage rating of 200v is used. the external 30v zener diode (z1) and the 143k current limiting resistor (rz) protect the v in supply pin of the ltc2960. note that there is a speed penalty which is the time constant determined by rz and c1, 14.3ms in this example. if v in is below 30v, there is a voltage drop across rz that is dependent on the quiescent current of the ltc2960 which is nominally less than 150mv but can be as high as 290mv if mr is pulled low. the maximum voltage drop is determined by the maximum specified i cc and mr pull-up currents. for conditions where the zener conducts current, it can be biased in the microamp range owing to the low quiescent current of the ltc2960. for a supply voltage of 150v, the zener is biased <1ma. when input pins are used to sense v in , the input pins adj/in + / in C absolute maximum rating of 3.5v must not be exceeded. v in can be a maximum of 8.75x the lowest programmed threshold to satisfy this condition. for a maximum v in of 150v, the lowest programmable threshold is >17v.
ltc2960 12 2960f when a supply voltage is abruptly connected to the input resonant ringing can occur as a result of series inductance. the peak voltage could rise to 2x the input supply but in practice can reach 2.5x if a capacitor with a strong volt- age coefficient is present. if a 12v supply is hot plugged the resulting ringing could reach the abs max of v cc . any circuit with an input of more than 7v should be scrutinized for ringing. circuit board trace inductances of as little as 10nh can produce significant ringing. one effective means to eliminate ringing is to include a 10C100 resistance in series with the supply input before the v cc capacitor shown in figure 7(b). this provides damp- ing for the resonant circuit but imposes a time constant to v cc . in figure 7(b), the time constant of rs and c1 is 2s. figure 7. operation with high voltage transients and hot swapping c1 0.1f 50v rz 143k pwc1206lf143kj* v cc z1 bzx84c30 bv = 30v v in max 200v ltc2960 (a) (b) c1 0.1f 50v rs 20 v in v cc ltc2960 2960 f07 *tt-irc typical applications figure 8. configurable regulator uvlo and low battery indicator configurable regulator uvlo and low battery indicator in the circuit of figure 8, the high voltage open drain out output is used as a configurable uvlo signal for a switching regulator. a li-ion battery can contain protec- tion circuitry that open circuits its terminals through an internal switch when it reaches 2.5v. with a threshold of 5.537v the ltc2960 out output disables the load before this occurs in order to prevent damage to the batteries. in addition to the uvlo signal, the ltc2960 provides a low battery indicator for the system. figure 9 shows an alternative arrangement in which the ltc2960 monitors the output of the 3.3v regulator to provide a reset signal. ltc2960-1 lt3991 v in v cc gnd v out en adj rt gnd mr in + rst out r3 5.11m* li-ion 4.2v li-ion 4.2v r2 49.9k v bat 6v to 8.4v v out 3.3v c1 0.1f 25v r1 348k low battery r5 1m r4 10m 2960 f08 c2 47f 16v uvlo falling threshold = 5.537v reset falling threshold = 6.33v not all lt3991 components shown buck converter + + *vishay-dale crcw series 0603 1% applications information
ltc2960 13 2960f typical applications figure 10. battery disconnect to protect against deep discharge figure 9. configurable regulator uvlo and supervisor figure 11. automotive supervisor ltc2960-1 lt3991 v in v cc gnd v out en in + rt gnd mr adj rst out r2 6.04m li-ion 4.2v li-ion 4.2v v bat 6v to 8.4v v out 3.3v c1 0.1f 25v r1 402k r esd * 10k reset r6 1m r4 2.26m r3 402k r5 10m 2960 f09 uvlo falling threshold = 6.410v reset falling threshold = 2.649v *optional resistor for added esd protection + + c2 47f 16v not all lt3991 components shown buck converter ltc2960-2 v cc in C rt gnd mr adj rst out r2 5.6m* li-ion 4.2v li-ion 4.2v v bat 6v to 8.4v m1 si4435 m2 si4435 v out c1 0.1f 25v r1 402k* low battery r5 10m r4 6.04m* r3 402k* r6 100k r7 1m 1n5245 15v 2960 f10 in C falling threshold = 5.974v adj falling threshold = 6.410v + + r8 10k *vishay-dale crcw series 0603 1 % ltc2960-3 v cc in + gnd mr out adj rst dv cc r2 825k r7 1m v in 4v to 27v 12v vehicle battery irlr2908 v out 3.3v c1 1f 50v r1 80.6k uv ov r6 6.04m r5 1m r8 102k r7 4.99k r4 1.78m r3 1m 2960 f11 c2 22f 25v in + falling threshold = 4.49v adj falling threshold = 2.816v lt3991 buck converter v in gnd v out fb en/ss lt4356 v cc gnd gate out flt fb not all lt3991 components shown
ltc2960 14 2960f typical applications the ltc2960-2 in figure 10 is yet another way to prevent excessive discharge of a battery. the high voltage out output is used to drive the gate of a pmos switch to in- terrupt the path to v out in the event of an undervoltage condition. when the battery stack voltage is above the in C rising threshold of 5.972v, the pmos switch is turned on. the ltc2960-2 also supervises v out to provide a low battery signal as an early warning of impending shutdown. a 10k resistor is included in series with the v cc pin to limit current in the event of a reverse battery condition. in all three examples, the load drops to <2.5a typically and excessive battery drain is prevented. automotive supervisor (ltc2960 h-grade) the circuit in figure 11 uses the ltc2960-3 (h-grade) as a low voltage supervisor capable of operating in temperatures up to 125c in automotive environments. the lt4356 surge stopper limits v in to 27v under the alternator load dump condition. the lt3991 buck regulator in conjunction with the ltc2960 draw <10a quiescent current for no load, which limits the drain on the vehicle battery even after long periods of inactivity. window comparator for high voltage input the ltc2960-4 can be configured as a window compara- tor to monitor high voltage supplies or battery stacks as shown in figure 12. a fault signal is generated if v in is out of regulation. the out output of the ltc2960-4 is fed back into the mr input to drive the rst output. a micropower ldo provides bias to the active pull-up dv cc supply for low static current draw in the outputs. micropower power supply sequencer and supervisor figure 13 illustrates multiple uses for the ltc2960 in a power supply system. u1 is a power supply sequencer whose in + input monitors v in and enables the 5v switch- ing regulator. the adj input monitors the output of the 5v switching regulator and enables the 1.8v ldo after a 16ms reset timeout period. u2 is a supervisor monitor- ing the 5v and 1.8v outputs. the out output by virtue of the mr pin, keeps the rst output low until the 1.8v supply is ready. lt3009-5 v in gnd out shdn ltc2960-4 v cc gnd mr in C adj dv cc rst out r3a 7.32m* r3b 118k* r4 10k r2 68k* v in 16.4v v out 5v 20ma max c1 0.1f 50v r1 182k* fault 2960 f12 c2 1f 16v upper threshold = 16.897v lower threshold = 12.3v *vishay-dale crcw series 0603 1% figure 12. window comparator for high voltage input
ltc2960 15 2960f information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. 0.25 0.05 1.37 0.05 (2 sides) recommended solder pad pitch and dimensions apply solder mask to areas that are not soldered 0.64 0.05 (2 sides) 1.15 0.05 0.70 0.05 2.55 0.05 package outline 0.45 bsc 2.00 0.10 (4 sides) 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.40 0.10 bottom viewexposed pad 0.64 0.10 (2 sides) 0.75 0.05 r = 0.115 typ r = 0.05 typ 1.37 0.10 (2 sides) 1 4 8 5 pin 1 bar top mark (see note 6) 0.200 ref 0.00 C 0.05 (dc8) dfn 0409 reva 0.23 0.05 0.45 bsc pin 1 notch r = 0.20 or 0.25 45 chamfer dc8 package 8-lead plastic dfn (2mm 2mm) (reference ltc dwg # 05-08-1719 rev a) note: 1. drawing is not a jedec package outline 2. drawing not to scale 3. all dimensions are in millimeters package description please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. 1.50 C 1.75 (note 4) 2.80 bsc 0.22 C 0.36 8 plcs (note 3) datum a 0.09 C 0.20 (note 3) ts8 tsot-23 0710 rev a 2.90 bsc (note 4) 0.65 bsc 1.95 bsc 0.80 C 0.90 1.00 max 0.01 C 0.10 0.20 bsc 0.30 C 0.50 ref pin one id note: 1. dimensions are in millimeters 2. drawing not to scale 3. dimensions are inclusive of plating 3.85 max 0.40 max 0.65 ref recommended solder pad layout per ipc calculator 1.4 min 2.62 ref 1.22 ref ts8 package 8-lead plastic tsot-23 (reference ltc dwg # 05-08-1637 rev a) 4. dimensions are exclusive of mold flash and metal burr 5. mold flash shall not exceed 0.254mm 6. jedec package reference is mo-193
ltc2960 16 2960f linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2012 lt 0312 ? printed in usa related parts typical application part number description comments ltc1326 micropower triple supply monitor for 5v/2.5v, 3.3v and adj 4.725v, 3.118v, 1v threshold (0.75%) and adj ltc1726 micropower triple supply monitor for 2.5v/5v, 3.3v and adj adjustable reset and watchdog timeouts ltc1727 micropower triple supply monitor with open-drain reset individual monitor outputs in msop ltc1728 micropower triple supply monitor with open-drain reset 5-lead sot-23 package LTC1985 micropower triple supply monitor with push-pull reset output 5-lead sot-23 package ltc2900/ltc2901/ ltc2902 programmable quad supply monitor adjustable reset, watchdog timer and tolerance, 10-lead msop and dfn packages ltc2903 precision quad supply monitor 6-lead sot-23 and dfn packages ltc2904/ltc2905/ ltc2906/ltc2907 three-state programmable precision dual supply monitor 8-lead sot-23 and dfn packages ltc2908 precision six-supply monitor (four fixed and two adjustable) 8-lead sot-23 and dfn packages ltc2909 precision triple/dual input uv, ov and negative voltage monitor shunt regulated v cc pin, adjustable threshold and reset, 8-lead sot-23 and dfn packages ltc2910 octal positive/negative voltage monitor separate v cc pin, eight inputs, up to two negative monitors adjustable reset timer, 16-lead ssop and dfn packages ltc2912/ltc2913/ ltc2914 single/dual/quad uv and ov voltage monitors separate v cc pin, adjustable reset timer ltc2915/ltc2916/ ltc2917/ltc2918 single voltage supervisors with 27 pin-selectable thresholds manual reset and watchdog functions, 8- and 10-lead tsot-23, msop and dfn packages ltc2934 ultralow power supervisor with adj and pfi inputs 500na quiescent current, 2mm 2mm 8-lead dfn and tsot-23 packages ltc2935 ultralow power supervisor with eight pin-selectable thresholds 500na quiescent current, 2mm 2mm 8-lead dfn and tsot-23 packages figure 13. micropower power supply sequencer and supervisor ltc2960-1 6.6v < v in < 36v v cc gnd mr in + adj rt out u1 rst ltc2960-1 15ms delay 200ms delay 2960 f14 v cc gnd mr out rt adj in + rst c1 0.1f 25v r1 402k r2 6.04m r3 10m v in supply uvlo = 6.410v 1.8v supply uvlo = 3.863v reset threshold = 1.693v r4 402k r8 1.3m r7 402k r9 1m 1.8v output 5v output rst r5 3.48m r6 1m lt3991 v in gnd v out en lt3009-1.8 in gnd out shdn c3 1f 10v c2 47f 16v not all lt3991 components shown buck converter u2

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